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docs/pulse2/flash-imaging.md
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docs/pulse2/flash-imaging.md
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PULSE Flash Imaging
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===================
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This document describes the PULSE flash imaging protocol. This protocol
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was originally designed for use over PULSEv1, but also works over the
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PULSEv2 Best-Effort transport.
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The flash imaging protocol is used to write raw data directly to the
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external flash. It is a message-oriented protocol encapsulated in PULSE
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frames. The primary goals of the protocol are reliability and speed over
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high-latency links.
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* All client-sent commands elicit responses
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* As much as possible, any command can be resent without corrupting the
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flashing process. This is to accommodate the situation where the
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command was received and acted upon but the response was lost, and the
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client retried the command.
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* Any notification (server→client message which is not a response to a
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command) can be lost without holding up the flashing process. There
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must be a way to poll for the status of all operations which elicit
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notifications.
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* Most of the state is tracked by the client. The server only has to
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maintain a minimal, fixed-size amount of state.
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> The idempotence of writing to flash is leveraged in the design of this
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> protocol to effectively implement a [Selective Repeat ARQ](http://en.wikipedia.org/wiki/Selective_Repeat_ARQ)
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> with an unlimited window size without requiring the server to keep
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> track of which frames are missing. Any Write Data command to the same
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> location in flash can be repeated any number of times with no ill
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> effects.
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## Message format
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All fields in a message which are more than one octet in length are
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transmitted least-significant octet (LSB) first.
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All messages begin with a 1-octet Opcode, followed by zero or more data
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fields depending on the message. All Address fields are offsets from the
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beginning of flash. Address and Length fields are specified in units of
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bytes.
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### Client Commands
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#### 1 - Erase flash region
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Address: 4 octets
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Length: 4 octets
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#### 2 - Write data to flash
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Address: 4 octets
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Data: 1+ octets
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The data length is implied.
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#### 3 - Checksum flash region
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Address: 4 octets
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Length: 4 octets
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#### 4 - Query flash region geometry
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Region: 1 octet
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Region | Description
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-------|-------------------
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1 | PRF
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2 | Firmware resources
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#### 5 - Finalize flash region
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Region: 1 octet
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Inform the server that writing is complete and perform whatever task is
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necessary to finalize the data written to the region. This may be a
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no-op.
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Region numbers are the same as for the "Query flash region geometry"
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message.
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### Server Responses
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#### 128 - ACKnowledge erase command
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Address: 4 octets
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Length: 4 octets
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Complete?: 1 octet
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Complete field is zero if the erase is in progress, nonzero when the
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erase is complete.
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#### 129 - ACKnowledge write command
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Address: 4 octets
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Length: 4 octets
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Complete?: 1 octet
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#### 130 - Checksum result
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Address: 4 octets
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Length: 4 octets
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Checksum: 4 octets
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The legacy Pebble checksum ("STM32 CRC") of the specified memory is
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returned.
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#### 131 - Flash region geometry
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Region: 1 octet
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Address: 4 octets
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Length: 4 octets
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A length of zero indicates that the region does not exist.
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#### 132 - ACKnowledge finalize flash region command
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Region: 1 octet
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#### 192 - Malformed command
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Bad message: 9 octets
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Error string: 0+ octets
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#### 193 - Internal error
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Error string: 0+ octets
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Something has gone terribly wrong which prevents flashing from
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proceeding.
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<!-- vim: set tw=72: -->
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