From 6fcb2ed60ef035182238b78770e9e5f13b83a7d2 Mon Sep 17 00:00:00 2001 From: Josh Soref <2119212+jsoref@users.noreply.github.com> Date: Tue, 28 Jan 2025 15:17:41 -0500 Subject: [PATCH] spelling: occurs Signed-off-by: Josh Soref <2119212+jsoref@users.noreply.github.com> --- platform/robert/boot/src/drivers/display/boot_fpga.c | 2 +- platform/snowy/boot/src/drivers/display/snowy_boot_fpga.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/platform/robert/boot/src/drivers/display/boot_fpga.c b/platform/robert/boot/src/drivers/display/boot_fpga.c index 3d44ce83..1aee20aa 100644 --- a/platform/robert/boot/src/drivers/display/boot_fpga.c +++ b/platform/robert/boot/src/drivers/display/boot_fpga.c @@ -140,7 +140,7 @@ void display_init(void) { // Work around an issue which some boards exhibit where the FPGA ring // oscillator can start up with higher harmonics, massively overclocking the - // design and causing malfunction. When this occurrs, the draw-scene command + // design and causing malfunction. When this occurs, the draw-scene command // will not work, asserting BUSY indefinitely but never updating the display. // Other commands such as display-on and display-off are less affected by the // overclocking, so the display can be turned on while the FPGA is in this diff --git a/platform/snowy/boot/src/drivers/display/snowy_boot_fpga.c b/platform/snowy/boot/src/drivers/display/snowy_boot_fpga.c index 20f88e9e..7a76e717 100644 --- a/platform/snowy/boot/src/drivers/display/snowy_boot_fpga.c +++ b/platform/snowy/boot/src/drivers/display/snowy_boot_fpga.c @@ -224,7 +224,7 @@ void display_init(void) { // Work around an issue which some boards exhibit where the FPGA ring // oscillator can start up with higher harmonics, massively overclocking the - // design and causing malfunction. When this occurrs, the draw-scene command + // design and causing malfunction. When this occurs, the draw-scene command // will not work, asserting BUSY indefinitely but never updating the display. // Other commands such as display-on and display-off are less affected by the // overclocking, so the display can be turned on while the FPGA is in this