mirror of
https://github.com/google/pebble.git
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151 lines
5.3 KiB
C
151 lines
5.3 KiB
C
/* Copyright 2015 Samsung Electronics Co., Ltd.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* Copyright (C) 2014 -2016 Espressif System
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*
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*/
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#ifndef __ESP82666_GPIO_H__
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#define __ESP82666_GPIO_H__
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#define GPIO_Pin_0 (BIT(0)) /* Pin 0 selected */
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#define GPIO_Pin_1 (BIT(1)) /* Pin 1 selected */
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#define GPIO_Pin_2 (BIT(2)) /* Pin 2 selected */
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#define GPIO_Pin_3 (BIT(3)) /* Pin 3 selected */
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#define GPIO_Pin_4 (BIT(4)) /* Pin 4 selected */
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#define GPIO_Pin_5 (BIT(5)) /* Pin 5 selected */
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#define GPIO_Pin_6 (BIT(6)) /* Pin 6 selected */
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#define GPIO_Pin_7 (BIT(7)) /* Pin 7 selected */
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#define GPIO_Pin_8 (BIT(8)) /* Pin 8 selected */
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#define GPIO_Pin_9 (BIT(9)) /* Pin 9 selected */
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#define GPIO_Pin_10 (BIT(10)) /* Pin 10 selected */
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#define GPIO_Pin_11 (BIT(11)) /* Pin 11 selected */
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#define GPIO_Pin_12 (BIT(12)) /* Pin 12 selected */
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#define GPIO_Pin_13 (BIT(13)) /* Pin 13 selected */
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#define GPIO_Pin_14 (BIT(14)) /* Pin 14 selected */
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#define GPIO_Pin_15 (BIT(15)) /* Pin 15 selected */
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#define GPIO_Pin_All (0xFFFF) /* All pins selected */
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#define GPIO_PIN_REG_0 PERIPHS_IO_MUX_GPIO0_U
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#define GPIO_PIN_REG_1 PERIPHS_IO_MUX_U0TXD_U
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#define GPIO_PIN_REG_2 PERIPHS_IO_MUX_GPIO2_U
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#define GPIO_PIN_REG_3 PERIPHS_IO_MUX_U0RXD_U
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#define GPIO_PIN_REG_4 PERIPHS_IO_MUX_GPIO4_U
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#define GPIO_PIN_REG_5 PERIPHS_IO_MUX_GPIO5_U
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#define GPIO_PIN_REG_6 PERIPHS_IO_MUX_SD_CLK_U
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#define GPIO_PIN_REG_7 PERIPHS_IO_MUX_SD_DATA0_U
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#define GPIO_PIN_REG_8 PERIPHS_IO_MUX_SD_DATA1_U
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#define GPIO_PIN_REG_9 PERIPHS_IO_MUX_SD_DATA2_U
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#define GPIO_PIN_REG_10 PERIPHS_IO_MUX_SD_DATA3_U
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#define GPIO_PIN_REG_11 PERIPHS_IO_MUX_SD_CMD_U
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#define GPIO_PIN_REG_12 PERIPHS_IO_MUX_MTDI_U
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#define GPIO_PIN_REG_13 PERIPHS_IO_MUX_MTCK_U
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#define GPIO_PIN_REG_14 PERIPHS_IO_MUX_MTMS_U
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#define GPIO_PIN_REG_15 PERIPHS_IO_MUX_MTDO_U
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#define GPIO_PIN_REG(i) \
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(i==0) ? GPIO_PIN_REG_0: \
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(i==1) ? GPIO_PIN_REG_1: \
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(i==2) ? GPIO_PIN_REG_2: \
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(i==3) ? GPIO_PIN_REG_3: \
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(i==4) ? GPIO_PIN_REG_4: \
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(i==5) ? GPIO_PIN_REG_5: \
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(i==6) ? GPIO_PIN_REG_6: \
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(i==7) ? GPIO_PIN_REG_7: \
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(i==8) ? GPIO_PIN_REG_8: \
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(i==9) ? GPIO_PIN_REG_9: \
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(i==10)? GPIO_PIN_REG_10: \
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(i==11)? GPIO_PIN_REG_11: \
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(i==12)? GPIO_PIN_REG_12: \
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(i==13)? GPIO_PIN_REG_13: \
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(i==14)? GPIO_PIN_REG_14: \
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GPIO_PIN_REG_15
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#define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4)
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#define GPIO_ID_IS_PIN_REGISTER(reg_id) ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
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#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
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typedef enum
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{
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GPIO_PIN_INTR_DISABLE = 0,
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GPIO_PIN_INTR_POSEDGE = 1,
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GPIO_PIN_INTR_NEGEDGE = 2,
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GPIO_PIN_INTR_ANYEGDE = 3,
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GPIO_PIN_INTR_LOLEVEL = 4,
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GPIO_PIN_INTR_HILEVEL = 5
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} GPIO_INT_TYPE;
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typedef enum
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{
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GPIO_Mode_Input = 0x0,
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GPIO_Mode_Out_OD,
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GPIO_Mode_Output ,
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GPIO_Mode_Sigma_Delta
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} GPIOMode_TypeDef;
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typedef enum
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{
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GPIO_PullUp_DIS = 0x0,
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GPIO_PullUp_EN = 0x1
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} GPIO_Pullup_IF;
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typedef struct
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{
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uint16 GPIO_Pin;
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GPIOMode_TypeDef GPIO_Mode;
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GPIO_Pullup_IF GPIO_Pullup;
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GPIO_INT_TYPE GPIO_IntrType;
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} GPIO_ConfigTypeDef;
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#define GPIO_OUTPUT_SET(gpio_no, bit_value) gpio_output_conf (bit_value<<gpio_no, \
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((~bit_value)&0x01)<<gpio_no, 1<<gpio_no, 0)
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#define GPIO_OUTPUT(gpio_bits, bit_value) do { \
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if (bit_value) { gpio_output_conf (gpio_bits, 0, gpio_bits, 0); } \
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else { gpio_output_conf(0, gpio_bits, gpio_bits, 0); } \
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} while (0)
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#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_conf (0, 0, 0, 1 << gpio_no)
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#define GPIO_AS_INPUT(gpio_bits) gpio_output_conf (0, 0, 0, gpio_bits)
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#define GPIO_AS_OUTPUT(gpio_bits) gpio_output_conf (0, 0, gpio_bits, 0)
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#define GPIO_INPUT_GET(gpio_no) ((gpio_input_get () >> gpio_no)&BIT0)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void gpio16_output_conf (void);
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void gpio16_output_set (uint8 value);
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void gpio16_input_conf (void);
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uint8 gpio16_input_get (void);
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void gpio_output_conf (uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask);
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void gpio_intr_handler_register (void *fn);
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void gpio_pin_wakeup_enable (uint32 i, GPIO_INT_TYPE intr_state);
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void gpio_pin_wakeup_disable ();
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void gpio_pin_intr_state_set (uint32 i, GPIO_INT_TYPE intr_state);
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uint32 gpio_input_get (void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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