Commit graph

8 commits

Author SHA1 Message Date
Anthony Foxclaw
13069b7ebd Fixed a few old bugs
- Fixed a where the VM excuted one loop regardless of instructions.
- Use the full 32 bits if an instruction is less.
2020-02-09 18:43:23 -05:00
Anthony Foxclaw
b825931ce5 Support for memory allocation
- Corten now has basic support for memory allocation through with the ALOC code.
2020-02-09 16:41:13 -05:00
Anthony Foxclaw
86f060e0f5 Implemented HLT instruction
- Instructions are now detected automatically based on context
- Since MIPs can't decide if it wants to be open or not, Corten will be aiming to be more of a RISC-V VM in the long term.
2020-02-09 15:16:38 -05:00
Anthony Foxclaw
317feb9188 Minor fixes to the code 2020-02-08 15:36:04 -05:00
Anthony Foxclaw
853188b010 Fixed bug with VM assigning wrong opcode
- Fixed a bug with VM assigning wrong opcode. After doing a little digging into the Iridium 1 source code (skipping to the next part of the tutorial), I discovered I had to have implement from() function in both directions. I.e. the Opcode outputs integer and integer outputs an Opcode. Derp moment in retrospective since I already had it done for the former but this is a learning experience.
- Moved Opcode enum to assembler module.
2020-02-08 15:14:37 -05:00
Anthony Foxclaw
afb68e46b3 Finished assembler paser
The assembler parser is finished and all tests do pass but the "load" command keeps pointing to "sub" for some reason.
2020-02-07 23:53:59 -05:00
Anthony Foxclaw
fe69c0d0c8 Implemented more of the assembler 2020-02-07 22:33:36 -05:00
Anthony Foxclaw
4bfde58cc5 Wrote AssemblerInstruction and Program parser 2020-02-07 21:49:56 -05:00